Tentative schedule for CIS 351

Week Date Topics Reading Milestones
1 Mon. 27 Aug. Introduction
Truth Tables
Circuit Overview
Use of Binary and Conversions
Sections 1.1 - 1.5
Video 1
Assign First Day Survey
Assign Homework 1: Introduction to Digital Logic
Tue. 28 Aug. Lab: Conversions Assign Lab 1: Number Conversions
Due First Day Survey
Wed. 29 Aug. Details of "Big Hammer"
Basic Logic Gates
Sections 1.7 and 1.9
Sections 2.1, 2.2, and 2.4
Fri. 31 Aug. Failure of Big Hammer to Scale Section 5.2.1
Videos 2-5
Due Lab 1: Number Conversions
2 Mon. 3 Sep. No Class
Tue. 4 Sep. No Class
Wed. 5 Sep. Ripple Carry Adder in-class exercise Assign Introduction to JLS
Assign Project 1: Build an Adder
Fri. 7 Sep. Ripple Carry Adder details
Circuit time/size
Introduce JLS
Section 2.9 Due Homework 1: Introduction to Digital Logic
3 Mon. 10 Sep. Size and time of Ripple Carry adder
Tue. 11 Sep. Combinatorial Circuits Lab Assign Lab 2: Introduction to Digital Logic
Wed. 12 Sep. Carry Lookahead Adder
Fri. 14 Sep. Carry Select Adder
Twos Complement
Multiplexors
Sections 2.3, 2.5, 2.8 Assign Project 2: Build a Subtractor and SLT
4 Mon. 17 Sep. Twos Complement
Tue. 18 Sep. Work on Projects 1 and 2 Assign Lab 3: Subtraction and Comparison
Wed. 19 Sep. Boolean Algebra and Muxes Due Project 1: Build an Adder
Assign Homework 2: Boolean Algebra
Fri. 21 Sep. Latches Sections 3.1, 3.2, 3.3 Assign Homework 3: Sequential Circuits
5 Mon. 24 Sep. Flip Flops Due Project 2: Build a Subtractor and SLT
Tue. 25 Sep. Assign Lab 4: Sequential Circuits
Wed. 26 Sep. Flip Flops and Sequential Circuits Sections 3.4, 3.5, and 3.6 Due Homework 2: Boolean Algebra
Fri. 28 Sep. Finite State Machines
6 Mon. 1 Oct. Intro to CPU Design
Intro to Assembly
Sections 7.1 and 7.3.1
Sections 6.1, 6.2, 6.3, and 6.4.1
Tue. 2 Oct. Assembly Intro Lab Assign Lab 5: Introduction to Assembly
Wed. 3 Oct. R-Type instruction
Fetch/Execute cycle
How programs are loaded From OSinto memory
Section 6.3.1
Fri. 5 Oct. I-Type instructions
Design principles
Sections 6.3.2, 7.3.2 and 7.3.3 Due Homework 3: Sequential Circuits
Due Practice Test 1
7 Mon. 8 Oct. Test Review Assign Project 3: Build an ALU
Tue. 9 Oct. Test 1
Wed. 10 Oct. I-Type implementation
Making the common case fast
Sections 6.5 and 6.7.1
Fri. 12 Oct. Branch and Jump Sections 6.3.3, 6.4.2, 6.4.3
8 Mon. 15 Oct. Load and Store Section 6.4.5
Tue. 16 Oct. Assign Lab 6: Assembly Branches
Wed. 17 Oct. using .data in Assembly Assign Homework 4: Single Cycle CPU
Fri. 19 Oct. Load Store implementation
Heap and Stack
9 Mon. 22 Oct. System calls
Function calls
Section 6.4.6 Due Project 3: Build an ALU
Assign Homework 5: Loops and Memory
Tue. 23 Oct. Assign Lab 7: Computer Instruction Types
Wed. 24 Oct. Answer questions about Homework Due Homework 4: Single Cycle CPU
Fri. 26 Oct. Control Wires
10 Mon. 29 Oct. Single Cycle Performance
Interrupts
Sections 7.2 and 7.3.4
Section 6.7.2
Tue. 30 Oct. Assign Lab 8: Finish Single Cycle CPU
Assign Practice Test 2
Wed. 31 Oct. RAM
SRAM Implementation
DRAM Implementation
SRAM vs. DRAM
Section 8.1 Due Homework 5: Loops and Memory
Fri. 2 Nov. Memory layout Section 8.3 Due Practice Test 2
11 Mon. 5 Nov. Memory Heirarchy
(Motivation for caches)
Tue. 6 Nov. Test 2
Wed. 7 Nov. Direct Mapped Cache Assign Homework 6: Cache
Fri. 9 Nov. Cache Block Size
12 Mon. 12 Nov. Set Associative caches Due Lab 8: Finish Single Cycle CPU
Tue. 13 Nov. Assign Lab 9: Cache (part 1)
Wed. 14 Nov. Cache Replacement Policy Due Homework 6: Cache
Fri. 16 Nov. Split/Unified caches Assign Homework 7: Pipeline Implementation
Due Homework 6: Cache
13 Mon. 19 Nov. Cache review
Tue. 20 Nov. Assign Lab 10: Cache (part 2)
Wed. 21 Nov. No class
Fri. 23 Nov. No class
14 Mon. 26 Nov. Basic pipelining Assign Homework 8: Pipeline Performance
Tue. 27 Nov. Assign Lab 11: Pipeline
Wed. 28 Nov.
Fri. 30 Nov.
15 Mon. 3 Dec. Due Homework 7: Pipeline Implementation
Tue. 4 Dec. Assign Lab 12: Recursion
Wed. 5 Dec. Due Homework 8: Pipeline Performance

Assignment List

Due Name Details
Tue. 28 Aug. First Day Survey
Fri. 7 Sep. Homework 1: Introduction to Digital Logic
Wed. 19 Sep. Project 1: Build an Adder
Mon. 24 Sep. Project 2: Build a Subtractor and SLT
Wed. 26 Sep. Homework 2: Boolean Algebra
Fri. 5 Oct. Practice Test 1
Fri. 5 Oct. Homework 3: Sequential Circuits
Mon. 22 Oct. Project 3: Build an ALU
Wed. 24 Oct. Homework 4: Single Cycle CPU Please work in pairs.
Wed. 31 Oct. Homework 5: Loops and Memory
Fri. 2 Nov. Practice Test 2
Fri. 16 Nov. Homework 6: Cache Problems 1 - 6 only.
Mon. 3 Dec. Homework 7: Pipeline Implementation
Wed. 5 Dec. Homework 8: Pipeline Performance
Fri. 7 Dec. Practice Final Not due for credit

Labs

Date Name Details
Tue. 28 Aug. Lab 1: Number Conversions
Tue. 11 Sep. Lab 2: Introduction to Digital Logic
Tue. 18 Sep. Lab 3: Subtraction and Comparison Get started on Project 2
Tue. 25 Sep. Lab 4: Sequential Circuits
Tue. 2 Oct. Lab 5: Introduction to Assembly
Tue. 16 Oct. Lab 6: Assembly Branches
Tue. 23 Oct. Lab 7: Computer Instruction Types
Tue. 30 Oct. Lab 8: Finish Single Cycle CPU Please work in pairs
Tue. 13 Nov. Lab 9: Cache (part 1)
Tue. 20 Nov. Lab 10: Cache (part 2)
Tue. 27 Nov. Lab 11: Pipeline
Tue. 4 Dec. Lab 12: Recursion

Updated Wednesday, 28 November 2018, 9:03 PM

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