CIS 351 |
Lab 8: Finish Single Cycle CPU |
Fall 2018 |
For this lab, you going to complete the single-cycle CPU discussed in Chapter 7 of the Harris and Harris textbook. You will need to
StarterCPU.jls
for j
, sw
, and
lw
.
starterMicrocode
as a sample.)jal
and jr
to your CPU.
Your complete CPU should support these instructions:
Name | Mnemonic | Format | OpCode (in hex) |
Func Code (in hex) |
---|---|---|---|---|
Add | add | R | 0 | 20 |
Add Unsigned | addu | R | 0 | 21 |
Add Immediate | addi | I | 8 | |
Add Immediate Unsigned | addiu | I | 9 | |
And | and | R | 0 | 24 |
And Immediate | andi | I | c | |
Branch if Equal | beq | I | 4 | |
Branch on Not Equal | bne | I | 5 | |
Halt | halt |   | 20 | |
Jump | j | J | 2 | |
Jump and link | jal | J | 3 | |
Jump Register | jr | R | 0 | 08 |
Load Word | lw | I | 23 | |
Load Upper Immediate | lui | I | F | |
Nor | nor | R | 0 | 27 |
Or | or | R | 0 | 25 |
Or Immediate | ori | I | d | |
Set Less Than | slt | R | 0 | 2a |
Set Less Than Unsigned | sltu | R | 0 | 2b |
Set Less Than Immediate | slti | I | a | |
Set Less Than Immediate Unsigned | sltiu | I | b | |
Store Word | sw | I | 2b | |
Subtract | sub | R | 0 | 22 |
Subtract Unsigned | subu | R | 0 | 23 |
Xor | xor | R | 0 | 26 |
Xor Immediate | xori | I | e |
Control
subcircuit in the starter CPU to see how it works.)
The control unit loads the lookup table from a file named singleCycleMicrocode
.This file must be in
the current working directory (otherwise, JLS won't find it, and will silently load the microcode lookup table
with all 0s). The file format is a list of address-value pairs. The address is either (a) the opcode, or (b) the the
function code plus 0x40
for R-type instructions. The value is the values of the control wires bundled
together. Both addresses and values are in hexadecimal.
Bits | Control wire / Sequencing |
---|---|
15 | halt |
15 | unused |
13 | unused |
12 | unused |
11 | Jump |
10 | RegWrite |
9 | ALUsrc |
8 | MemWrite |
4-7 | ALUop |
3 | MemToReg |
2 | MemRead |
1 | Branch |
0 | RegDest |
Use starterMicrocode
as a sample and starting point.
WE
, OE
, and
CS
inputs to RAM and ROM are active low.
memWrite
and memRead
wires are 1 when a
memory write or memory read is desired.
PC + 4
, not
PC
.
JLSCircuitTester
suite contains a program,jlsCPUTester
, that takes as input (1)
yourJLS
circuit and (2) a file containing MIPS assembly code and
Important:
singleCycleMicrocode
and that the file is
located in the current working directory (i.e., the directory from which you launch jlsCPUTester
).
JLS.jar
and Mars.jar
must be in the same directory as thejlsCPUTester
script
As with previous projects, all the executable code needed for this lab is in
/home/kurmasz/public/CS451/bin
. If you add this directory to your path, you will be able to run all
test scripts directly from the command line. If you choose not to add this directory to your path, you will have to
use the full path name when launching the scripts below. To run the test scripts on your own machine, you must
follow the JLSCircuitTester
installation
instructions.
As always, please tell me as soon as possible if you have any problems.
(If you are in Prof. Kurmas's section, I recommend you complete this assignment on the EOS machines so you can test your CPU without having to install the testing program.)
Notes:
jlsCPUTester
detects some bugs.
lw $16, val1
is a pseudo instruction. It won't
work unless both lui
and lw
work.
To debug your CPU, you may want to run test programs by hand. The Instruction Memory I provided is configured to load
instructions from a file named instructions
. You will want to maintain several different test programs.
Make sure these programs are not namedinstructions
, and simply copy (not move) the program you want to
test to instructions
. Once you have copied the file, JLS will automatically load instruction memory with
the desired program. (The file instructions
must be in the current working directory. This is the
directory from which you launched JLS. Be careful when launching JLS from an icon because it may not be obvious which
directory is the current working directory.)
Similarly, make sure your microcode is in a file named singleCycleMicrocode
and that the file is
located in the current working directory (i.e., the directory from which you launch JLS).
The JLSCircuitTester
suite contains marsAssembler
, a program that will take assembly
files as input and generate MIPS code formatted for use as aninstructions
file: The file contains two
columns. The first is the word address of the instruction in hex, and the second is the MIPS binary
instruction in hex. Currently marsAssembler
writes only to the standard output. Use file redirection to
save the output to a file.
To examine the results of your program, place a watch on any registers of interest and the RAM unit for Main Memory. When simulating the CPU, I like to set the "Step" value equal to the clock period.
This assignment will be worth 50 points, divided as follows:
Basic instructions (add , addi , beq etc.) |
10 points | |
Load and Store | 4 points | |
j |
4 points | |
bne | 4 points | |
jal | 4 points | |
jr | 4 points | |
correct sign extension | 4 points | |
"tight" clock period | 2 points | |
neatness / documentation | 4 points | (This means add comments! Please put the clock configuration in one of the comments.) |
timeliness | 10 points | (+2 if early, -2 for each day late.) |
Penalties
Note: It may not be possible to effectively test some instructions if others are broken. For example, it is not
possible to test lw
without first using an I-type instruction to load the base register. The list above
reflects my testing order. If it is not possible to easily test instruction y
because instruction
x
is broken, you will receive 0 points for instruction y
. Thus, if your I-type instructions
are broken, you will likely receive a 0 for the assignment.
Add a text box to your jls
files that includes
When you are convinced your CPU works, e-mail me both your CPU and microcode files.
Note:
Updated Sunday, 4 November 2018, 8:12 PM