Note: Follow this link for additional information about each video including
| Week | Date | Topics | Reading | Milestones | |
|---|---|---|---|---|---|
| 1 | Mon. 18 Jan. | No Class Introduction Truth Tables Circuit Overview How to build logic gates Use of Binary Hexadecimal and Base Conversions |
Video 0 Sections 1.1 - 1.5 Video 1 Video 2 Video 3 Video 4 Video 5 |
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| Tue. 19 Jan. | Lab: Tools | Assign Lab 1: Tools | |||
| Wed. 20 Jan. | Course Overview Binary / hex / change of base |
Flippy bit A hexadecimal game Tom Lehrer's "New Math" |
Assign First Day Survey Assign In-Class 1: Conversions Assign Homework 1: Introduction to Digital Logic Assign More Conversion Practice |
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| Fri. 22 Jan. | Truth tables / "Big Hammer" | Assign In-Class 2: Truth Tables and PLAs Due First Day Survey |
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| 2 | Mon. 25 Jan. | Failure of Big Hammer to Scale Combinatorial Circuits Other Gates |
Video 6 Section 2.4 Video 7 Sections 2.1, 2.4, and 2.5 Video 8 Sections 1.5.5 and 1.5.6 |
Assign In-Class 3: Combinatorial Circuits Due Lab 1: Tools |
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| Tue. 26 Jan. | Lab: Conversions or Comb. Circuits | Assign Lab 2a: Number Conversions Assign Lab 2b: Introduction to Digital Logic |
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| Wed. 27 Jan. | Boolean Expressions Functional Completeness |
Video 9 Section 2.2 Video 10 |
Assign In-Class 3: Combinatorial Circuits (cntd.) | ||
| Fri. 29 Jan. | Busses / Bitwise logic operations Test 1: Conversions |
Section 2.9 | |||
| 3 | Mon. 1 Feb. | Adders Propagation Delay Time of Circuits Circuit Size |
Video 11 Section 5.2 Video 12 Section 1.6 Video 13 Section 2.9 Video 14 |
Due: Last week's Lab Due Homework 1: Introduction to Digital Logic Assign In-Class 4: Propagation Delay Assign In-Class 5: Adder |
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| Tue. 2 Feb. | Lab: Unsigned Adder | Assign Lab 3: Unsigned Adder Assign Project 1: Build an Adder |
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| Wed. 3 Feb. | Carry Lookahead Adder | Video 15 Section 5.2 | |||
| Fri. 5 Feb. | Carry Select Adder "Hybrid" adders / size/time tradeoff Diminishing returns |
Video 16 |
Assign In-Class 6: Two's Complement Assign In-Class 7: AdvancedAdders |
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| 4 | Mon. 8 Feb. | Signed Integers / Two's Complement Signed Addition |
Video 18 Section 1.4.6 Video 19 |
Due Lab 3: Unsigned Adder | |
| Tue. 9 Feb. | Lab: Conversions or Comb. Circuits | Assign Lab 2a: Number Conversions Assign Lab 2b: Introduction to Digital Logic |
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| Wed. 10 Feb. | Mulitplexors 2-to-1 mux is functionally complete Boolean Algebra |
Video 22 Section 2.3 |
Assign Homework 2: Boolean Algebra | ||
| Fri. 12 Feb. | Test 2: Comb. Circuit Fundamentals | ||||
| 5 | Mon. 15 Feb. | ALUs More Boolean Algebra |
Video 22 | Due: Last week's Lab Due Project 1: Build an Adder |
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| Tue. 16 Feb. | Begin Project 2 | Assign Project 2: Build a Subtractor and SLT | |||
| Wed. 17 Feb. | Complex Combinatorial Circuits | Assign Project 3: Build an ALU Assign In-Class 8: Circuit with Choices |
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| Fri. 19 Feb. | Latches | Video 23 Sections 3.1, 3.2, 3.3 | Assign In-Class 9: SR-Latch Assign Homework 3: Sequential Circuits |
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| 6 | Mon. 22 Feb. | Clocks and Clocked Latches Flip-Flops Sequential Circuits |
Video 24 Video 25 Section 3.2.3 Video 26 Sections 3.4, 3.5, and 3.6 |
Assign In-Class 10: Flip Flop Timing Due Homework 2: Boolean Algebra |
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| Tue. 23 Feb. | Assembly Intro or Sequential Circuit Lab | Assign Lab 4a: Sequential Circuits Assign Lab 4b: Introduction to Assembly |
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| Wed. 24 Feb. | Finite state Machines | Video 27 | Assign Project 3: Build an ALU | ||
| Fri. 26 Feb. | Test 3: Comb. Circuit Application | ||||
| 7 | Mon. 1 Mar. | Intro to CPU Design, Words, and Registers Machine languge and MIPS R-type Fetch/Execute cycle Generating and Loading Machine Code Assembly Basics Intro to MIPS Assembly |
Video 28 Sections 7.1 and 7.3.1 Video 29 Section 6.3 Video 30 Sections 7.1.3 and 7.3.1 Video 31 Video33 Video 34 Sections 6.1, 6.2, 6.3, and 6.4.1 |
Due Project 2: Build a Subtractor and SLT | |
| Tue. 2 Mar. | Assembly Intro or Sequential Circuit Lab | Video 35 | Assign Lab 4b: Introduction to Assembly Assign Lab 4a: Sequential Circuits |
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| Wed. 3 Mar. | I-Type instructions Design principles |
Video 32 Sections 6.5 and 6.7.1 Video 36 Sections 6.3.2, 7.3.2 and 7.3.3 |
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| Fri. 5 Mar. | Test 4: Boolean Algebra | Due Homework 3: Sequential Circuits | |||
| 8 | Mon. 8 Mar. | Jump Branch |
Video 37 Sections 6.3.3, 6.4.2, and 7.3 Video 38 Sections 6.4.2, 6.4.3, and 6.4.4 |
Due Project 3: Build an ALU Due: Last week's Lab |
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| Tue. 9 Mar. | Computer Instruction Types | Assign Lab 5: Computer Instruction Types | |||
| Wed. 10 Mar. | No Class | ||||
| Fri. 12 Mar. | Jump Branch |
Video 37 Sections 6.3.3, 6.4.2, and 7.3 Video 38 Sections 6.4.2, 6.4.3, and 6.4.4 |
Assign In-Class 11: Branches | ||
| 9 | Mon. 15 Mar. | Test 5:Sequential Circuits | Due Lab 5: Computer Instruction Types | ||
| Tue. 16 Mar. | Assembly Branches | Assign Lab 6: Assembly Branches | |||
| Wed. 17 Mar. | Design principles Load and Store using .data in Assembly Load Store implementation |
Sections 6.3.2, 7.3.2 and 7.3.3 Section 6.4.5 |
Assign Homework 4: Single Cycle CPU | ||
| Fri. 19 Mar. | Writing assembly with loops and memory | Section 6.4.5 | Assign In-Class 12: Loops | ||
| 10 | Mon. 22 Mar. | Control Wires | Due Lab 6: Assembly Branches Assign Project 4: Build Single Cycle CPU Assign In-Class 12: Control Wires |
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| Tue. 23 Mar. | Loops and Memory | Assign Lab 7: Loops and Memory | |||
| Wed. 24 Mar. | Control Wires | Assign Assembly Review | |||
| Fri. 26 Mar. | Test 6:Assembly Branches | ||||
| 11 | Mon. 29 Mar. | Single Cycle Performance Karnaugh Maps Function calls Clobbered Registers Using "s" registers Heap and Stack |
Sections 7.2 and 7.3.4 K-Map Introduction 4-variable K-map Video 39 Section 6.4.6 Video 40 Video 41 Section 6.4.6 |
Due Lab 7: Loops and Memory Due Homework 4: Single Cycle CPU Assign Homework 5: Recursion |
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| Tue. 30 Mar. | No Lab | ||||
| Wed. 31 Mar. | RAM SRAM Implementation DRAM Implementation SRAM vs. DRAM Memory layout |
Section 8.1 Section 8.3 |
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| Fri. 2 Apr. | Test 7:Assembly Loops | Due Project 4 (Phase 1) | |||
| 12 | Mon. 5 Apr. | Memory Heirarchy Motivation for caches Direct Mapped Cache Cache Block Size |
Video 45 Section 8.1 Video 46 Section 8.3 Video 47 |
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| Tue. 6 Apr. | Cache Lab (part 1) | Assign Lab 8: Cache (part 1) | |||
| Wed. 7 Apr. | Set Associative caches Cache replacement policy LRU and Pseudo-LRU Split/Unified cache Write Through / Write Back cache |
Video 49 Section 8.3 Video 50 Video 51 |
Assign Homework 6: Cache | ||
| Fri. 9 Apr. | Test 8:CPU Implementation | ||||
| 13 | Mon. 12 Apr. | Pipelining Data Hazards |
Intro to Pipelining | Due Lab 8: Cache (part 1) | |
| Tue. 13 Apr. | Cache Lab (part 2) | Assign Lab 9: Cache (part 2) | |||
| Wed. 14 Apr. | Control Hazards | Due Homework 6: Cache | |||
| Fri. 16 Apr. | Pipeline speedup / Limitations | Assign Homework 7: Pipeline Implementation Due Project 4: Build Single Cycle CPU |
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| 14 | Mon. 19 Apr. | Interrupts | Due Lab 9: Cache (part 2) | ||
| Tue. 20 Apr. | Pipelining | Assign Lab 10: Pipeline | |||
| Wed. 21 Apr. | Due Homework 7: Pipeline Implementation Assign Practice Final |
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| Fri. 23 Apr. | Assign Homework 8: Pipeline Performance | ||||
| 15 | Mon. 26 Apr. | Final Exam: 2:00 p.m. | (For Section 01 meeting MWF at 3:00) | Due Homework 8: Pipeline Performance Due Lab 10: Pipeline Due Homework 5: Recursion Due Practice Final |
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| Tue. 27 Apr. | |||||
| Wed. 28 Apr. | Final Exam: 8:00 a.m. | (For Section 03 meeting MWF at 9:00) | |||
| Fri. 30 Apr. |
| Due | Name | Details |
|---|---|---|
| Fri. 22 Jan. | First Day Survey | |
| Mon. 1 Feb. | Homework 1: Introduction to Digital Logic | |
| Mon. 15 Feb. | Project 1: Build an Adder | |
| Mon. 22 Feb. | Homework 2: Boolean Algebra | |
| Mon. 1 Mar. | Project 2: Build a Subtractor and SLT | |
| Fri. 5 Mar. | Homework 3: Sequential Circuits | |
| Mon. 8 Mar. | Project 3: Build an ALU | |
| Mon. 29 Mar. | Homework 4: Single Cycle CPU | Please work in pairs. |
| Fri. 2 Apr. | Project 4 (Phase 1) | |
| Wed. 14 Apr. | Homework 6: Cache | Problems 1 - 6 only. |
| Fri. 16 Apr. | Project 4: Build Single Cycle CPU | Please work in pairs |
| Wed. 21 Apr. | Homework 7: Pipeline Implementation | |
| Mon. 26 Apr. | Homework 8: Pipeline Performance | Not due for credit |
| Mon. 26 Apr. | Homework 5: Recursion | |
| Mon. 26 Apr. | Practice Final | Not due for credit |
| Date | Name | Details |
|---|---|---|
| Tue. 19 Jan. | Lab 1: Tools | Individual assignment |
| Tue. 2 Feb. | Lab 3: Unsigned Adder | |
| Tue. 9 Feb. | Lab 2a: Number Conversions | Individual assignment |
| Tue. 9 Feb. | Lab 2b: Introduction to Digital Logic | |
| Tue. 2 Mar. | Lab 4a: Sequential Circuits | |
| Tue. 2 Mar. | Lab 4b: Introduction to Assembly | |
| Tue. 9 Mar. | Lab 5: Computer Instruction Types | |
| Tue. 16 Mar. | Lab 6: Assembly Branches | |
| Tue. 23 Mar. | Lab 7: Loops and Memory | |
| Tue. 6 Apr. | Lab 8: Cache (part 1) | |
| Tue. 13 Apr. | Lab 9: Cache (part 2) | |
| Tue. 20 Apr. | Lab 10: Pipeline |
Updated Wednesday, 21 April 2021, 10:18 AM