Note: Follow this link for additional information about each video including
| Week | Date | Topics | Reading | Milestones | |
|---|---|---|---|---|---|
| 1 | Mon. 12 Jan. | Course Overview Introduction Truth Tables Circuit Overview How to build logic gates Use of Binary Hexadecimal and Base Conversions |
Video 0: Overview Sections 1.1 - 1.5 Video 1 (CL1, CL3a) Video 2 (HW1) Video 3 (NR1c,d) Video 4 (NR1) Video 5 (NR3, NR4) Flippy bit A hexadecimal game Tom Lehrer's "New Math" |
Assign First Day Survey Assign In-Class 1: Conversions Assign In-Class 2: Truth Tables and PLAs Assign Homework 1: Relays Assign Homework 2: Introduction to Digital Logic Assign More Conversion Practice |
|
| Wed. 14 Jan. | Truth tables / "Big Hammer" Failure of Big Hammer to Scale Combinatorial Circuits Other Gates Boolean Expressions |
Video 6 Section 2.4 Video 7 Sections 2.1, 2.4, and 2.5 (CL3b) Video 8 Sections 1.5.5 and 1.5.6 Video 9 Section 2.2 (CL3c,d) |
Due First Day Survey Assign In-Class 3: Combinatorial Circuits Assign Homework 3: JLS Setup |
||
| Fri. 16 Jan. | Functional Completeness Busses / Bitwise logic operations |
Video 10 Section 2.9 |
Assign In-Class 4: Functional Completeness Assign In-Class 5: Busses and Bitwise Operations Due Homework 1: Relays |
||
| 2 | Mon. 19 Jan. | No Class | |||
| Wed. 21 Jan. | Adders Propagation Delay Time of Circuits Circuit Size |
Video 11 Section 5.2 Video 12 Section 1.6 (CL4) Video 13 Section 2.9 Video 14 |
Assign In-Class 6: Adder Assign In-Class 7: Propagation Delay Due Homework 2: Introduction to Digital Logic Assign Homework 3: JLS Setup Assign Project 1: Build an Adder |
||
| Fri. 23 Jan. | Quiz 1: | NR3, NR4, CL2 | |||
| 3 | Mon. 26 Jan. | Carry Lookahead Adder | Video 15a, Video 15b, Section 5.2 (ADD3cl) |
Due Homework 3: JLS Setup | |
| Wed. 28 Jan. | Carry Lookahead Adder Carry Select Adder "Hybrid" adders / size/time tradeoff Diminishing returns |
Video 15a, Video 15b, Section 5.2 (ADD3cl) Video 16 (ADD3cs) CL3, CL4, [NR3, NR4, CL2] |
Assign In-Class 9: AdvancedAdders | ||
| Fri. 30 Jan. | Signed Integers / Two's Complement Signed Addition Quiz 2: |
Video 18 Section 1.4.6 (NR2) Video 19 (ADD4) |
Assign In-Class 8: Two's Complement | ||
| 4 | Mon. 2 Feb. | Mulitplexors 2-to-1 mux is functionally complete |
Video 22 (CL5) |
Assign Project 2: Build a Subtractor and SLT | |
| Wed. 4 Feb. | ALUs Complex Combinatorial Circuits Latches |
Video 22 (CL5) Video 23 Sections 3.1, 3.2, 3.3 (SL1) |
Assign In-Class 10: Circuit with Choices Due Project 1: Build an Adder |
||
| Fri. 6 Feb. | Clocks and Clocked Latches Quiz 3: |
Video 24 (SL2) Clocked D Latch NR2, ADD4 [CL4] |
Assign In-Class 11: SR-Latch Assign Project 3: Build an ALU |
||
| 5 | Mon. 9 Feb. | Exam 1 | |||
| Wed. 11 Feb. | Flip-Flops Sequential Circuits |
Video 25 Section 3.2.3 (SL2) Video 26 Sections 3.4, 3.5, and 3.6 (SL4, SL6) |
Assign In-Class 12: Flip Flop Timing Assign Homework 4: Sequential Circuits Due Project 2: Build a Subtractor and SLT |
||
| Fri. 13 Feb. | Flip-Flops Sequential Circuits Quiz 4: |
Video 25 Section 3.2.3 (SL2) Video 26 Sections 3.4, 3.5, and 3.6 (SL4, SL6) CL5 [NR2, ADD4] |
| Due | Name | Details |
|---|---|---|
| Wed. 14 Jan. | First Day Survey | Please email me a .pdf or slide a printout under my door. |
| Fri. 16 Jan. | Homework 1: Relays | |
| Wed. 21 Jan. | Homework 2: Introduction to Digital Logic | |
| Mon. 26 Jan. | Homework 3: JLS Setup | |
| Wed. 4 Feb. | Project 1: Build an Adder | |
| Wed. 11 Feb. | Project 2: Build a Subtractor and SLT |
| Date | Name | Details |
|---|
Updated Tuesday, 27 January 2026, 10:05 AM