Paging

• Key idea: Fixed size segments eliminate external fragmentation
• They also provide a lot of flexibility
• Fixed-size units are called pages
• The corresponding unit in physical memory is a page frame
• Any page can be placed in any frame.
• Simply grab first frame from free list
• Requires a per-process data structure called a page table
  • Used for address translations.
• How do we efficiently do address translation?
  • Since pages are all the same size, it’s very similar to caching.
  • First n bits are a page number. Use that to look up the base value, then add the offset.
• Note that the offset stays the same.
• Any guesses as to what the challenges are?
• Consider a 32-bit address space with 4KB (2^12) byte pages.
  • How is the address split?
    • 20 bits for the page, 12 bits for the offset.
  • How bit is the page table? (What do you need to know to answer this question).
    • Assuming 4 byte (32 bit) page table entry, this is 4MB per process
    • That’s 400MB if the system is running 100 processes.
• Where does this page table go?
• What are the implications of putting it in RAM
  • Every memory access requires a secondary memory access.
  • What about cache?
  • Remember L1 cache is only about 8KB.
• (For now, picture page table as stored in RAM that OS controls.)
• What data must be in the page table? (More than just frame).
  • Hint: Think of cache.
  • Valid bit. {: .q} Why?
• What is the implication of not having a valid bit?
  • Protection could be violated.
• Other page table data:
  • Read (“allowed to read”) bit
  • Write bit (“Allowed to write”). (How might this be used?)
  • Execute bit. (How might this be used?)
  • Present bit (used later)
  • Dirty bit (used for page replacement)
  • Reference bit (“has been accessed”) (used for page replacement)

  Page Table in Memory is even worse

  • Consider accessing memory using an in-memory page table
  • Suppose there is a hardware page table base register
  • Need to calculate the address of the base table entry (a few instructions)
  • Read the page table entry (which is a memory access itself)
  • Reconstruct the physical address
  • Must do this for each memory reference – which means every instruction access!
  • Bottom line: Every RAM access becomes two! And every instruction is at least one RAM access.