For this project, you will use JLS to implement a signed adder.

You should work in teams of two. This project is a lot of work. Working alone is foolish.

Begin by following this GitHub Classroom link to create the repository for this project. You may want to copy your unsigned adder from the lab into this new repo.

Task

Implement a 16-bit signed adder using any algorithm you wish, provided the circuit (1) has a reasonable size, (2) a running time of 225 or better, and (3) at least partially incorporates elements of a sub-linear algorithm (carry-lookahead, carry-select, Kogge-Stone, etc.) Your adder must report overflow conditions when they occur (with respect to signed inputs). Notice that this circuit must have an input named CarryIn. You will use this input for future projects.

The starter code contains a file named SignedAdder_16bit.jls. You must place your solution in this file. Do not change the names of any of the inputs or outputs. (If you change the filename or the names of any inputs/outputs, the automated tests will not work.)

CarryOut is the carry out from the last full adder. It is also, in effect, the overflow indicator for unsigned inputs. Overflow is the overflow indicator for signed inputs. Remember, CarryOut and Overflow will not necessarily have the same value.

You may use SampleSigned16BitAdderTest.java as a basis for your own tests. Warning! This test file is incomplete. Don't assume that a circuit that passes this sample test will pass all of my tests.

Rules

1. You are strongly encouraged to work in groups of two. You may work alone only with permission of the instructor.
2. The simulator comes with a built-in adder. You may not use the built-in adder.
3. To build the required circuits, you will probably find it useful to design and build several subcircuits. These subcircuits may have any interface you choose; however, you are responsible for testing them.
4. You must write all of your own circuits/subcircuits. In other words, you may not share "internal" subcircuits with your classmates, or download them off the Internet.
5. Be sure to test your components thoroughly. Just because your adder passes the test included here doesn't mean it will pass my tests.

Hints and shortcuts

• Remember, you can create and import subcircuits (analogous to writing a function in code). Go to "File -> Import" to import a saved subcircuit.
• JLS inserts the code for sub-circuits directly into the circuits into which they are imported. Thus, changes to sub-circuits are not seen by the circuits that contain them. If you discover a bug in a sub-circuit, you must delete and re-import every instance of that sub-circuit into the parent. (Again, test your subcircuits thoroughly before importing them!)
• Remember that no software is perfect. This includes JLS and DLUnit. Commit and push your code often. That way, if JLS does crash you won't lose too much work. Also, please e-mail me with any bugs you find or feature requests you have. If JLS crashes, please e-mail me the JLSerror file.

Analysis

When your adder passes all of the automated tests, prepare a document that discusses its overall design and analyzes its

• exact size
• exact running time
• big-O running time

To compute the exact size, simply count the total number of gates used. (You don't need to consider the number of inputs.)

To compute the exact time, compute the propagation delay using the default component delays given by JLS (10 for AND, OR, XOR, 5 for NOT, NAND, NOR, etc.). To see a component's default delay, right-click on it and choose "change timing" from the context menu. (Look at the time; but, don't actually chagne it!)

Your adder's big-O running time describes how the running time will change if you applied your pattern to adders of increasing size.

Finally, add a paragraph or two discussing your adder's overall design. In particular, if you used a hybrid design, list any sub-linear addition algorithms used and how you incorporated them into your adder.

Place this information in a file named either analysis.txt or analysis.pdf. For each answer, please include a paragraph or two describing how you got your answer.

Grading

You are expected to revise your circuits and analysis documents until both (1) the automated tests pass, and (2) the analysis document has earned a score of "E" or "M". Project "Late Days" will accumulate until both requirements have been satisfied.

Extra Credit: You can earn extra credit on this project based on the time of your adder:

• ≤ 150: 1 point
• ≤ 100: 2 point

You can also accumulate up to -2 Late Days if you project meets all requirements before the deadline. (Negative Late Days can be used to offset any Late Days acquired on other projects or labs.)

Submission

To submit your project:

1. Add a text box to your jls files that includes the names of all team members.
2. Place your analysis in a file named analysis.txt or analysis.pdf.
3. Push your project with [Grade Me] in the commit message. ([Grade Me] is not a formal syntax, it is just tells me that you are ready for me to look at your project.)

Updated Thursday, 2 September 2021, 12:48 PM