CIS 351 |
Project 3: Build an ALU |
Fall 2021 |
Combine your adder, adder/subtracter, and comparator from previous projects into a single ALU. Notice that you will not be implementing the ALU described in the textbook. Your ALU will have different operations and op codes.
Your ALU must perform the following 16-bit operations:
| Unsigned addition | 0 |
| Unsigned subtraction | 1 |
| And | 2 |
| Or | 3 |
| Not | 4 |
| Xor | 5 |
| lui | 6 |
| sltu | 7 |
| Signed addition | 8 |
| Signed subtraction | 9 |
| slt | 15 |
ALU_16bit.jls and don't rename any inputs or outputs.Overflow output to 0 if overflow doesn't apply to the given operation. Specifically, Overflow
should be 0 for all operations except signed addition and signed subtraction. (Interestingly enough, by
definition, unsigned addition and unsigned subtraction do not overflow.)
not operator returns the negation of InputA. Ignore InputB.lui stands for load upper immediate. Take the lower 8 bits of InputA and place
them in the upper 8 bits of the output. Ignore InputB.
slt stands for set if less than. The output should be 1 if InputA
is less than InputB and 0 otherwise. slt treats the inputs as signed integers,
sltu treats the numbers as unsigned.
Sample16BitALUTest.javaJLS
and DLUnit. Commit and push often.
You are expected to revise your circuits and analysis documents until both (1) the automated tests pass, and (2) your circuit design and layout have earned a score of "E" or "M". Project "Late Days" will accumulate until both requirements have been satisfied. Remember: There are two separate sets of tests to run.
You can accumulate up to -1 Late Days if you project meets all requirements before the deadline. (Negative Late Days can be used to offset any Late Days acquired on other projects or labs.)
To submit your project:
jls files that includes the names of everybody on the team.
[Grade Me] to the commit message.Updated Monday, 4 October 2021, 1:39 PM