CIS 451

Multicycle Microcode

Fall 2019

For this project, you will write the microcode for the multi-cycle CPU presented in Chapter 7 of the Harris and Harris textbook. I am providing a jls file for the entire CPU. You need only write the microcode.

Pre-requisites

You will need to understand how to turn assembly language statements into machine language statements. You will also need to understand how the control lines should be set for each instruction. (This is covered in Chapter 7.) Finally, you will need to understand the basics of microcode. We covered this in class. In addition, this is (partially) covered by Appendix D of the Patterson and Hennessy textbook.

The "Intro to JLS" labprovides an introduction to using JLS that you may find useful. This lab also explains how to obtain, set up, and use JLS, as well as use the DLUnit testing software. It is not due for credit.

This video demonstrates several helpful JLS shortcuts. Remember, JLS was designed specifically with these projects in mind. If you find a task highly repetitive/tedious, you are probably overlooking a shortcut.

(Note: This assignment does not require you to modify the .jls file; so, you need not spend a lot of time learning JLS.)

Microcode design

The microcode for this CPU is a 212 element ROM containing 24-bit words. The highest 20 bits are used to specify the values of the control lines for one clock cycle. The low-order 2 bits are used to specify which line of microcode to load next. (Some bits are unused.)

Bits Control wire / Sequencing
22 - 23 PCSource
21 PCWrite
20 PCWriteCond
   
16-19 ALUop
   
15 ALUSrcA
13 - 14 ALUSrcB
12 IRWrite
   
11 IorD
10 MemRead
9 MemWrite
8 MemToReg
   
7 RegDest
6 RegWrite
5 Halt
4 Error
   
3 unused
2 unused
1 dispatch
0 next

The lowest two bits control the sequencing of micro instructions.

Dispatch Next Action
0 0 load microinstruction 0
0 1 load next microinstruction
1 0 use dispatch table

The dispatch table for this project is a ROM containing 128 12-bit words. Each line in ROM corresponds to one op code or function code and contains the microcode address for that instruction (Address 0-63 are used for opCodes; address 64 through 127 correspond to the function code plus 64.) The microcontroler for this project has only one dispatch table. The microcode for more complex CPUs contain several dispatch tables.

Interface

Place your microcode in a file named microcode. Place your dispatch table in a file named dispatch1. Do not change the names or timing of any of the CPU elements.

The microcode and dispatch1 files are text files containing two columns. The first column is the word number in hex. The second column in the hexadecimal representation of the data. You may have blank lines and may use a hash # for a comment. For example, here are two sample lines from my microcode:
0 223401 # 001000100011010000000001b
1 026002 # 000000100110000000000010b

These two lines of microcode are shared by all instructions. They should appear only as lines 0 and 1 of the microcode file.)

Instruction list

Implement microcode for each of the instructions listed below. Instructions marked with (*) are not required and may require additional gates and/or control lines not shown in Figure 7.41.

Name Mnemonic    Format   OpCode  
(in hex)  
Func Code  
(in hex)  
Add add R 0 20
Add Immediate addi I 8
And and R 0 24
And Immediate andi I c
Branch on Equal beq I 4
*Branch on Not Equal bne I 5
Halt halt   20
Jump j J 2
*Jump and link jal J 3
*Jump Register jr R 0 08
Load Word lw I 23
Load Upper Immediate lui I F
Nor nor R 0 27
Or or R 0 25
Or Immediate ori I d
Set Less Than slt R 0 2a
Set Less Than Immediate slti I a
Store Word sw I 2b
Subtract sub R 0 22

Hints

Testing

To test your CPU, have it execute assembly code, then check that the registers and memory contain the expected values. You are responsible for writing the assembly code to thoroughly test your CPU. I am providing only the demonstration test files below. They are nowhere near a complete test of your CPU:

Running tests automatically

This semester, you will be using a beta version of DLUnit that can test CPUs. This program will

  1. assemble the assembly file into MIPS machine code,
  2. simulate the running of your CPU with the machine code,
  3. run the machine code using MARS (a SPIM-like CPU simulator), and
  4. compare the final state of your CPU to that calculated by MARS.

The testing software is called DLUnit_cpu.jar and can be downloaded here.

To run the test program

  1. Download DLUnit_cpu.jar if you haven't yet.
  2. Download MultiCycleCPUTest.class if you haven't yet.
  3. Place your microcode is in a file named microcode.
  4. Place your dispatch table is in a file named dispatch1.
  5. From the directory containing your microcode and dispathch files, run java -jar CPUUnit.jar PHMultiCycleCPU.jls MultiCycleCPUTest.class --param your_test_file.a

Running tests by hand

To debug your microcode, you may want to run test programs by hand. Start by configuring the memory unit to load instructions from a file named instructions:

  1. Open PHMultiCycleCPU.jls in JLS.
  2. Point at the Memory unit and press Ctrl+M.
  3. Select Built-In.
  4. Enter instructions.
  5. Save the file.

Now, copy (not move) the machine code program you want to test to instructions. Once you have copied the file, JLS will automatically load instruction memory with the desired program. (The file instructions must be in the current working directory. This is the directory from which you launched JLS. Be careful when launching JLS from an icon because it may not be obvious which directory is the current working directory.)

Similarly, make sure your microcode is in a file named microcode and that the file is located in the current working directory (i.e., the directory from which you launch JLS).

The JLSCircuitTester suite (the old tester) contains marsAssembler, a program that will take assembly files as input and generate MIPS code formatted for use as aninstructions file: The file contains two columns. The first is the word address of the instruction in hex, and the second is the MIPS binary instruction in hex. Currently marsAssembler writes only to the standard output. Use file redirection to save the output to a file. This semester, the easiest way to use marsAssembler is to run it in EOS. Log into any EOS machine and run

/home/kurmasz/public/CS451/bin/marsAssembler assembly_file.a > instructions

To examine the results of your program, place a watch on any registers of interest and the RAM unit for Main Memory. When simulating the CPU, I like to set the "Step" value equal to the clock period.

Submission and grading

This assignment will be worth 80 points, divided as follows:

I-type 10 points
R-type 10 points
lw 10 points
sw 10 points
branch 10 points
jump 10 points
timeliness 20 points
(+2 if early, -2 for each day late.)

Your CPU won't receive a grade until it passes all of my tests. If your submission does not pass all my tests, I will ask you to fix and re-submit your CPU. The delay may reduce your timliness score. In addition, there is a 3 point penalty per buggy submission.

Deliverables

When you are confident your CPU is working properly:

  1. Add comments to your microcode and dispatch1 files that include
  2. Submit microcode, dispatch1, bug reports, and assembly code, and any other relevant files using Assignment Manager.

(All deliverables for this project may be submitted electronically.)


Updated Tuesday, 3 September 2019, 10:42 AM

W3c Validation